Semiconductor memory devices may be classified into volatile memory devices and nonvolatile memory devices. The nonvolatile memory devices do not lose data stored therein even if power is cut off. Thus, nonvolatile memory devices have been widely applied to mobile communication systems, portable memory devices, and auxiliary memory devices of digital apparatus.
A great deal of research has been conducted to develop new nonvolatile memory devices that are efficiently structured to improve integration density. As a result, phase-change memory devices have been proposed. A unit cell of the phase-change memory device includes a switching device and a data storage element that is serially connected to the switching device. The data storage element includes a lower electrode, which is electrically connected to the switching device, and a phase-change material layer, which is in contact with the lower electrode. The phase-change material layer is formed of a material that can be electrically switched between amorphous and crystalline states or between various resistive states within the crystalline state, depending on the magnitude of supplied current.
FIG. 1 is a partial cross-sectional view of a conventional phase-change memory device. Referring to FIG. 1, the phase-change memory device includes a lower insulating layer 12 disposed on a predetermined region of a semiconductor substrate 11, a lower electrode 14 disposed in the lower insulating layer 12, an upper insulating layer 13 disposed on the lower insulating layer 12, a bit line 18 disposed on the upper insulating layer 13, a phase-change pattern 16 disposed in the upper insulating layer 13 (and in contact with the lower electrode 14), and an upper electrode 17 electrically connecting the phase-change pattern 16 to the bit line 18. Also, the lower electrode 14 is electrically connected to a switching device such as a diode or a transistor.
When a program current is supplied through the lower electrode 14, Joule heat is generated at an interface between the phase-change pattern 16 and the lower electrode 14. Due to the Joule heat, a portion (hereinafter, a “transition region 20”) of the phase-change pattern 16 is changed into an amorphous state or a crystalline state. The transition region 20 has a higher resistivity when it is in the amorphous state than when it is in the crystalline state. Thus, by detecting the current flowing through the transition region 20 in a read mode, it can be determined whether data stored in the phase-change pattern 16 of the phase-change memory device is a logic ‘1’ or a logic ‘0.’
Here, the program current should increase in proportion to the area of the transition region 20. In this case, the switching device should be designed to have sufficient current drivability to supply the program current. However, the area occupied by the switching device is increased to improve the current drivability of the switching device. In other words, the transition region 20 with a smaller area is more advantageous to improving the integration density of the phase-change memory device.
Meanwhile, there have been extensive studies on techniques of storing multi-bit data in a single cell to increase the integration density of phase-change memory devices. Since the resistivity of the aforementioned phase-change material layer can vary within a wide range with a ratio of an amorphous structure to a crystalline structure, the phase-change material layer can theoretically store multi-bit data in a unit cell.
A multi-bit phase-change memory device is disclosed in U.S. Patent Publication No. 2004-0178404 entitled “Multiple Bit Chalcogenide Storage Device” by Ovshinsky. According to Ovshinsky, a phase-change memory cell includes three electrodes, which are respectively in contact with an upper surface, a bottom surface, and a lateral surface of a phase-change material layer. The phase of an upper region of the phase-change material layer is changed using the electrodes in contact with the upper and lateral surfaces of the phase-change material layer, and the phase of a lower region of the phase-change material layer is changed using the electrodes in contact with the bottom and lateral surfaces of the phase-change material layer, so that 2-bit data can be stored in a unit cell. However, the structure and fabrication process of the phase-change memory cell may become complicated, as may the configuration of a peripheral circuit for supplying a program current.